1. Field of the Invention
The present invention relates to a process for manufacturing a capacitor lower electrode. In particular, the present invention relates to a process for manufacturing a capacitor lower electrode of a micro stacked DRAM.
2. Description of Related Art
Please refer to FIGS. 1-5, a manufacturing process of a prior capacitor lower electrode of DRAM is described. First, provide a semiconductor substrate 1a with a lot of MOSFET (not shown in drawings) and conductor plugs 11a. The conductor plugs 11a are electrically connected to the drain or source of the MOSFET. Second, form a stacked structure 2a on the semiconductor substrate 1a. The stacked structure 2a includes an oxide layer 21a, a dielectric layer 22a, and a nitride layer 23a from bottom to top. The oxide layer 21a, the dielectric layer 22a, and the nitride layer 23a have different etching speed. As shown in FIG. 3, after form the stacked structure 2a, form a plurality of vias 24a via a photolithography process to make the conductor plugs 11a be exposed to the vias 24a. Third, put a metal plate 25a in each of the vias 24a. The metal plates 25a contact to the conductor plugs 11a. Fourth, form a capacitor lower electrode 26a in each of the vias 24a. Each of the capacitor lower electrodes 26a is formed as U shape in the sectional view thereof. The capacitor lower electrodes 26a are disposed on the metal plates 25a. Fifth, partially etch the nitride layer 23a and the capacitor lower electrodes 26a (as shown in FIGS. 1 and 4, the process is named “25 lattice etch”) to form an etching area 27a with an oval-shaped, and then etch the dielectric layer 22a via the etching area 27a (as shown in FIG. 5).
In order to improve the data capacity of DRAM, the density of the memory cells need to increased. Generally, the way to increase the density of the memory cells is to reduce the size of the capacitor lower electrodes 26a or increase the surface area of the capacitor lower electrodes 26a. As a result, it becomes hard to manufacture the capacitor lower electrodes 26a because of the small size of the capacitor lower electrodes 26a. The supporting force of capacitor lower electrodes 26a becomes weak such as to topple while disposing a capacitor dielectric layer and a capacitor upper electrode onto each of the capacitor lower electrodes 26a. Furthermore, after forming the etching area 27a, each of the capacitor lower electrodes 26a has different shapes, therefore it will influence the electrical property of capacitor.